This invention relates to a capacitor for a semiconductor memory, and to a method in which a photo CVD process is carried out so that the deposition is effectively performed also on insides of depressions.
There is broadly known and used a low pressure CVD method, a plasma CVD method, and a chemical vapor deposition method for semiconductor processing. In the semiconductor processing method, depressions such as a hole, a trench, a cave (a sub-surface re-entrant opening having surfaces out of line-of-sight) or so on are configured on whose surfaces are placed a product created by the CVD method to form a buried field insulating layer or an electric element such as a capacitance in the depression, or to fill an over-etching region in the form of a depression. When a formation of a layer on the depression is desired, it is inevitable that the thickness "ds" of the layer on an inner surface (depression) and the thickness "dt" of the layer on an upper surface result in dt/ds&gt;1. One of the problems of researching to obtain a finely configured semiconductor in the VLSI field is how an inverse ratio, namely ds/dt, can be increased near 1. Further, in the case where the depth of a cave has a measure more than the measure of the opening of the cave, it was impossible to form a uniform layer throughout the inside of the cave. Such caves are formed, e.g., with a known trench method which can dig a cave of depth having a measure 3 to 5 times as large as the measure of the width of the opening thereof. Anyhow, existing methods are not suitable to perform a deposition in such a cave.
Namely, according to an existing CVD method, atoms or molecules are deposited on a substrate in an excited condition which are diffused into vapor after being decomposed or after undergoing a reaction caused by thermal energy. The existing process can be performed effectively when it is carried out under negative pressure, since the active molecules have a relatively long mean free path in the vapor under a negative pressure, compared with that under the atmospheric pressure. For example, on a substrate with a trench of 2 micron meters in width and also in depth, a depression resulted in a layer 1 of micron meter thickness on the upper surface, a layer with at most a thickness of 0.7 micron meter on the side wall of the trench and a layer with the thickness of 0.6 micron meter on the bottom of the trench. In any case, a step coverage ds/dt is expected only up to about 0.7.
According to another known method, step coverages are no more than that of the above method. Normally, ds/dt=0.3-0.5. A plasma enhanced CVD alone is comparable with the above LPCVD.
Another problem associated with the prior art is as follows. When a surface having depressions is coated with an overlying layer, the top surface of the overlying layer inevitably becomes uneven. Some troubles are caused by the uneven surface. For example, when a multi-level interconnection is produced with intervening insulating films for isolating constituent electrode arrangements on different levels (as illustrated in FIGS. 8(A)-8(E)), the electrode arrangement (or pattern) overlying an uneven surface of the intervening insulating film may not be connected to the electrode pattern beneath the intervening insulating film.